The present invention generally relates to semiconductor memory devices and, more specifically, the present invention relates to nonvolatile memory devices and to memory systems including the same.
Semiconductor memory devices are generally classified as either volatile memory devices or nonvolatile memory devices. Volatile memory devices are characterized by the loss of stored data in the absence of supplied power, while the nonvolatile memory devices retain their stored data even when the supply of power is interrupted. Examples of volatile memory devices include SRAM, DRAM, SDRAM and the like. Examples of nonvolatile memory devices include ROM, PROM, EPROM, EEPROM, flash memory devices, PRAM, MRAM, RRAM, FRAM and the like. Among these, flash memory devices are generally classified as either NOR-type flash memory devices or NAND-type flash memory devices.
In the meantime, the wordlines of memory devices are typically made of polysilicon, which has a higher resistance-capacitance (RC) load than metallic conductors. Therefore, when a wordline driver applies an operational voltage to a polysilicon wordline, a portion of the wordline which is relatively close to a wordline driver reaches a target voltage more rapidly than a portion of the wordline which is relatively far from the wordline driver.
As mentioned above, the present invention generally relates to nonvolatile memory devices and to memory systems including the same.
In an exemplary embodiment, the nonvolatile memory device may include a plurality of memory cells connected to a wordline and arranged in a row direction, bitlines connected to the plurality of memory cells, respectively, and a bitline bias circuit configured to separately control bias voltages provided to the bitlines according to positions of the memory cells along the row direction.
In another exemplary embodiment, the nonvolatile memory device may include a plurality of wordlines, a plurality of bitlines intersecting the plurality of wordlines, a wordline driver configured to select the plurality of wordlines, and a bitline bias circuit configured to separately bias the respective bitlines according to distances between the respective bitlines and the wordline driver.
In yet another exemplary embodiment, a memory system may include a nonvolatile memory device and a controller configured to control the nonvolatile memory device, the nonvolatile memory device including a memory cell array including a plurality of wordlines and a plurality of bitlines, a row decoder configured to select the plurality of wordlines, and a bitline bias circuit configured to separately bias the respective bitlines according to distances between the respective bitlines and the row decoder during a program operation.